Memory Mapped IO Layout

Conventional memory

X86 based system has a range of 0-9FFFF for mapping conventional memory. DOS and any real mode operating system runs in this region. This area has size of 640Kb.

VGA frame buffer area

VGA compatible graphics card installed in the system uses A0000-BFFFF range for mapping video memory or VRAM.

BIOS ROM area (x86)

System BIOS in x86 runs from the area E0000-FFFFF. FFFF0 is the reset vector for x86 CPUs and still it is used for legacy BIOS area. BIOS area for X86 32bit or i386 CPU is below 4GB area but it copies legacy BIOS in this region.

BIOS ROM area (i386)

BIOS area for X86 32bit or i386 CPU starts few mega bytes below 4GB depending on the ROM size of the platform. I386 CPU has a reset vector at FFFFFFF0 so the BIOS maps from (4GB – ROM size) to 4GB area.

OPROM area

BIOS POST uses ROMs from the PCI cards to initialises the cards during boot-up time. These ROMs are located in PCI cards and they initialised the cards and makes services available to BIOS so that BIOS can boot through it. There are basically pre-boot device drivers. SATA, SAS controllers gives INT13 services and block protocols for booting through it. NIC cards gives BEV vectors and PxE protocols for booting through networks.

PCIe Extended config area

PCI uses 256 bytes of config area. PCIe however uses 4Kb of config are for each devices. Now PCIe compatible chipsets uses a region of memory to map this area in main memory region. 3GB or 0xC0000000 is the area for mapping this region. This area has a size of 256MB. It ranges from 0xC0000000 - 0xD0000000. 256 Buses * 32 (Devices)* 8 Functions*4Kb Config region

PCIe MMIO mapped area

PCI devices use MMIO region for mapping MMIO BARs. 32bit BARs are mapped below 4GB area. This area often starts after extended config space area. 64bit BARs are mapped above the memory area of maximum installable RAM area.

Local APIC and IO APIC

IO APIC used as the interrupt controller from different IO peripherals and LOCAL APIC is used for inter interrupt generation and routing between processor cores and handing local timers. IO APIC maps in 0xFEC00000 and Local APIC maps in 0xFEE00xxx. IO APIC address mapping is common to each core. However local APIC is local to each processor cores and each processor core has its own local APIC.

System RAM

32bit systems can have a memory range from 0-3GB. 64bit system can have more RAM area. Most of the modern server systems have an address bus of 42-46bits. This range enough to cover several tera bytes of system RAM.

Similar topics related to this section

BIOS, Booting, PC Firmare, Topics Index, Primary Base Memory, High, Extended Memory and IO Ports, Memory Mapped IO Layout, IO Port Ranges, Interrupt Lines, x86 Registers, Real Mode Memory Segmentation, Power On Self Test, H/W Inits, Software Interrupts, Keyboard Module and int16, VGA Display int10, Disk Subsystem int13, BIOS Config Screen, BIOS Development Code Flashing Debugging, Plug-n-Play, PCI card PnP Mechanism, PCI Config Address Space, PCI MMIO IO IRQ perations, BIOS Boot OPROMs Drivers, Disk Cylinder Head Sectors, MBR Disk Partitions, MBR and File Allocation Table Partitions, Boot Loader, Grand Universal Bootloader Linux Booting, NT Loader Windows Booting, Embedded System Booting, Unified Extensible Firmware Interface Stack, UEFI Development And Advantages, References and Links,