Write operations starts from CPU with instruction like store (strb). With a rising edge of hclk/pclk CPU places address to address bus and pulls down write enable line nWE. This way CPU tells it wants to write to internal register of peripheral. Now address has been placed so address decoder will select chip select line of the peripheral. Peripheral has to collect data bits which CPU has places in data bus. Here peripheral has wait line to tell the CPU to wait for 1-2 Clock cycles. CPU will wait till wait is high. If peripheral is ready to collect data then peripheral has to pull wait line. Now CPU will pull up write enable line. This way CPU tells that we are done with write. Now peripheral has to pull up wait and data line and it has to set it to high impedance state.
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